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Add "unit time delay (D)" operator to functional language with random signals instead of random vars

My current interest is the "good old theme" according to some that functional languages better match the operation of digital circuits in a "data flow" design as in behavioral VHDL, and could be used a language to describe such circuits from which the HDL is then generated. At the same time one could develop and simulate the behavior using an ordinary PC.

As many say, some imperative syntax regularly still comes in very handy even in a functional language. For instance, already if one tries to define a finite impulse response (FIR) filter and its underlying shift register, it comes to mind to make the "single assignment" in functional programming languages refer to "(random) signals" (i.e. time functions) instead of "(random) variables". A unit delay operator on such signals of a discrete time clock would then be a prominent operator in such a language. For instance, each element in the aforementioned shift register would be a one time unit delayed copy of its left neighbor, still defined with a single assignment. Only when such a delay operator is added to a functional language does the whole time dimension of signal processing open up.

I have searched the internet for ideas like this, but did not find a hit. My question is, whether idea like this have been explored before?