Lambda the Ultimate

Call for Participation:

ALTA 2008

Architectures and Languages for Throughput Applications

Program:

1. Chuck Moore, AMD
Accelerated Computing in the Multi-core Era

2. Havard Bjerke, CERN
High Throughput Computing for CERN's Large
Hadron Collider

3. Michael Shebanow, NVIDIA
Title TBD

4. Doug Carmean, Intel
Title TBD

5. Weiwu Hu, Chinese Academy of Sciences
A Brief Introduction to Loongson Processors

6. Sun Chan, Simplight Electronics
Towards a sequential programming model
for a multi-threaded architecture

7. Gabriel Loh, Georgia Tech
The Cost of Uncore in Throughput-Oriented
Many-Core Processors

8. Paul Peng, Intel
SEE: A Scalable Execution Environment
for Heterogeneous Processing Architectures”

9. Wing-Yee Lo, Jiqiang Song, Daniel Pak-Kong Lun,
Wan-Chi Siu
SIMD Throughput Bottleneck Improvement
Using Vector Load/Store and Configurable
SIMD Support

10. Changhai Zhao, Xiaohua Shi, Haihua Yan, Lei Wang,
Beihang University
Exploiting Coarse-Grained Data Parallelism
in Seismic Processing

11. Oscar Hernandez, Lei Huang, Barbara Chapman,
University of Houston, Danesh Tafti, Pradeep
Gopalkrishnan, Virginia Tech
Experiences Tuning an OpenMP Application

Sunday, 22nd June, Beijing, China

This is a workshop held in conjunction with ISCA 2008. For registration, see:

http://isca2008.cs.princeton.edu/
http://www.regonline.com/Checkin.asp?EventId=165151
(For registration)

For the ALTA website, see:

http://www.sei.buaa.edu.cn/alta08/

Program Committee
Doug Carmean, Intel Corporation
Tom Conte North Carolina State University
Mike Houston AMD
Michael McCool RapidMind Inc.
Michael Garland Nvidia
Sun Chan Simplight Nanoelectronics
Xiaohua Shi Beihang University

Organizers
Anwar Ghuloum, Intel Corporation
Gansha Wu, Intel Corporation
Michael Liao, Intel Corporation
Josh Fryman, Intel Corporation