Home

Back to the language roots

Link: The article discusses the future of HDLs given the encroachment of software programming languages.

It's not time for the revolution yet. Traditional hardware-description languages have specific features that make them superior to software programming languages; although SystemC has its place in the hardware-design process, it still can't compete with Verilog and VHDL...
Verilog may have C-like syntax and VHDL an Ada-like syntax, but there are significantly different concepts in HDLs and software programming languages. Most importantly, an HDL adds the notions of concurrency and time.

From a PL perspective, it always seems to get back to whether a dedicated language is better suited than a more flexible general purpose one. And whether the specifications are best verified within the language or by a suite of tools and tests.

By Chris Rathman at 2004-12-21 18:42 | General | other blogs | 5156 reads

Comment viewing options

Select your preferred way to display the comments and click "Save settings" to activate your changes.

And on the other side of the debate:

In the same issue is the article Compiling software to gates.

As a hardware engineer myself, it was a surprise to find that software engineers were taking my tools and regularly besting hardware engineers at hardware design. It took me a few years to realize it was the software engineering techniques that made the difference. The software approach allowed them to try out perhaps 10 or 20 different designs to every one they could try out in VHDL or Verilog. Designs done this way are better simply because the designer can dismiss many more suboptimal alternatives.

By Chris Rathman at Tue, 2004-12-21 18:55 | login or register to post comments