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A Tiny Computer

A Tiny Computer. An unpublished memo by Chuck Thacker, Microsoft Research, 3 September 2007. Posted with permission.

Alan Kay recently posed the following problem:

"I'd like to show JHS and HS kids 'the simplest non-tricky architecture' in which simple gates and flipflops manifest a programmable computer”.

Alan posed a couple of other desiderata, primarily that the computer needs to demonstrate fundamental principles, but should be capable of running real programs produced by a compiler. This introduces some tension into the design, since simplicity and performance sometimes are in conflict.

This sounded like an interesting challenge, and I have a proposed design.

Presents the design of a complete CPU in under two pages of FPGA-ready Verilog. The TC3 is a Harvard architecture 32-bit RISC with 1KB of instruction memory, 1KB of data memory, and 128 general-purpose registers. This design is an ancestor of the DDR2 DRAM Controller used in the BEE3.

To help us into the brave new world of Hardware/Software co-design!

By Luke Gorrie at 2009-03-13 02:04 | Fun | Implementation | other blogs | 40921 reads

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I had a similar idea to

I had a similar idea to Alan's when I visited the Computer History Museum and thought of kids rushing to the museum store looking for stimulating machines to play with at home or on the ride back home... While this is not a mechanical device of the sort I imagined, I think this memo should be printed out and handed to kids visiting the museum!

By Ehud Lamm at Fri, 2009-03-13 02:31 | login or register to post comments

What I had in mind is things

What I had in mind is things like Cardiac.

By Ehud Lamm at Sat, 2009-06-06 05:39 | login or register to post comments

Lisp, Forth, and Hardware

Hans Hübner's blog Lisp, Forth, and Hardware also makes my hackstincts twitch.

By Luke Gorrie at Fri, 2009-03-13 02:43 | login or register to post comments

MIPS

"Computer Organization and Design: The Hardware/software Interface" by Patterson & Hennessy presents a number of implementations of the MIPS instruction set, some of which are rather simple.

It's really easy to find emulators and real compilers and OSes for MIPS, which is a big advantage.

This one is smaller, but also less useful.

Other well supported CPUs that can be implemented quite minimally include the 6502 (not a good compiler target) and ARM.

By brucehoult at Fri, 2009-03-13 03:02 | login or register to post comments

A somewhat related book.

A somewhat related book.

By Ehud Lamm at Fri, 2009-03-13 03:16 | login or register to post comments

I've been really enjoying

I've been really enjoying that book lately! I find it much more fun and approachable than other digital logic books that I've seen.

By Luke Gorrie at Fri, 2009-03-13 03:36 | login or register to post comments

Petzold's CODE is also fantastic

Charles Petzold's CODE : The Hidden Language of Computer Hardware and Software is also great.

He starts out talking about friends using morse code like language, moves up the braille and binary codes, anatomy of a flash light. He doesn't get to "Logic and Switches" until chapter 10 and finishes the book by talking about operating systems, foating point math, high/low languages and finally "The Graphical Revolution."

By shahbaz at Fri, 2009-03-13 04:22 | login or register to post comments

Possibly simpler non-tricky architectures

Hi, Luke! Anything written by Chuck Thacker is worth reading, if you're into hardware design, anyway, so thanks for posting this gem.

Alan asked for the "simplest non-tricky architecture," so I'm curious why Chuck didn't propose an accumulator or 2-stack machine. Maybe those don't pass Chuck's "non-tricky" test, but eliminating the register file makes the hardware design a bit simpler still.

Incidentally, Alan has quite a few nice things to say about the B5000 architecture in this ACM Queue article. The B5000 was a stack-based architecture, though Alan doesn't mention whether he liked that aspect in particular. Maybe you could ask him ;)

By dhess at Fri, 2009-03-13 08:04 | login or register to post comments

B5000 posted

Hi Drew! Thanks for the prod, I posted the B5000 paper that he raves about.

I would love to see a 32-bit threaded-code Forth machine in two-or-so pages of Verilog!

By Luke Gorrie at Fri, 2009-03-13 08:19 | login or register to post comments

That was my initial thought

That was my initial thought too, but I haven't finished reading Chuck's note. You can't do away with the register file entirely; "register file" is another word for "RAM"! You can, however, distinguish different parts of it, e.g. to save bits in the instruction encoding, or (as in Forth) to reduce coupling.

By kragen at Sat, 2009-03-14 07:13 | login or register to post comments

STEPS

This is the same design that Thacker proposed in 2007, in the STEPS Toward The Reinvention of Programming: First Year Progress Report. The computer was intended to support the other parts of that project.

It's good to see more information about the processor than just the schematic diagram.

By Charles Stewart at Fri, 2009-03-13 10:14 | login or register to post comments

Interesting Architecture

The fact that you can carry out an arithmetic operation and a store at the same time is interesting. The fact that the registers are general purpose, but their are many complex instructions makes this look pretty fun to target. It would be nice to have an actual assembly language rather then just bits. But that shouldn't be two hard. The one problem I would fix is that the skips modify the *next* instruction. Lucky for us jumps don't do that. The limited number of instructions is real problem, as is the absence of a jump to a known offset. Both of these encourage magic constants to be held in registers, which I don't feel leads to understandable assembler. MMIX might be preferable, but it probably goes to far in the other direction.

By Watson Ladd at Sat, 2009-03-14 00:30 | login or register to post comments